== === === === === === === === === ===
Clear Display 0 0 0 0 0 0 0 0 0 1
Return Home 0 0 0 0 0 0 0 0 1 *
Entry Mode Set 0 0 0 0 0 0 0 1 I/D S
Display ON/OFF 0 0 0 0 0 0 1 D C B
Cursor and Display Shift 0 0 0 0 0 1 S/C R/L * *
Function Set 0 0 0 0 1 DL N F * *
Set CG RAM address 0 0 0 1 A A A A A A
Set DD RAM address 0 0 1 A A A A A A A
Read busy flag and address 0 1 BF A A A A A A A
Write data to CG or DD RAM 1 0 D D D D D D D D
Read data from CG or DD RAM 1 1 D D D D D D D D
Notes
* means 0 or 1 have no effect
Where execution times are given as A / B
A: applies for 1/8 duty or 1/11 duty (1 display line)
B: applies for 1/16 duty (2 display lines) N
I/D: 0 = Decrement cursor position 1 = Increment cursor position
S/C: 0 = Move cursor 1 = Shift display
R/L: 0 = Shift left 1 = Shift right
DL: 0 = 4-bit interface 1 = 8-bit interface
N: 0 = 1/8 or 1/11 Duty (1line) 1 = 1/16 Duty (2 lines)
F: 0 = 5x7 dots 1 = 5x10 dots
BF: 0 = Can accept instruction 1 = Internal operation in progress
D: Data Bits
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 0 0 0 0 0 0 0 1
Writes space code "20" (Hexadecimal) (character pattern for character code "20" must be blank pattern) into all DD RAM addresses.
Sets DD RAM address to 0 in the address counter. Returns display to its original status if it was shifted. In other words, the display disappears and the cursor or blink go to the left edge of the display (the first line if 2 lines are displayed).
Set I/D = 1 (Increment Mode) of Entry mode. S of Entry Mode doesn't change.
Execution Time = 82µs-1.64ms / 120µs-4.9ms
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 0 0 0 1 S/C R/L * *
Shifts cursor position or display to the right or left without writing or reading display data.
This function is used to correct or search for the display. In a 2-line display, the cursor moves to the 2nd line when it passes the 40th digit of the 1st line.
Notice that the 1st and 2nd line displays will shift at the same time. When the displayed data is shifted repeatedly each line only moves horizontally.
The 2nd line display does not shift into the 1st line position.
S/C R/L
=== ===
0 0 Shifts the cursor position to the left
(Address Counter is decremented by 1)
0 1 Shifts the cursor position to the right
(Address Counter is incremented by 1)
1 0 Shifts the entire display to the left
The cursor follows the display shift
1 1 Shifts the entire display to the right
The cursor follows the display shift
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 0 0 0 0 1 D C B
D: The display is ON when D = 1 and OFF when D = 0.
When off due to D = 0, display data remains in the DD RAM. It can be displayed immediately by setting D = 1.
C: The cursor displays when C = 1 and does not display when C = 0.
Even if the cursor disappears, the function of I/D, etc. does not change during display data write.
The cursor is displayed using 5 dots in the 8th line when the 5 x 7 dot character font is selected and 5 dots in the 11th line when the 5 x 10 dot character font is selected.
B: The character indicated by the cursor blinks when B = 1.
The blink is displayed by switching between all blank dots and display characters at 409.6 ms interval.
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 0 0 0 0 0 1 I/D S
I/D: Increments (I/D = 1) or Decrements (I/D = 0) the DD RAM address by 1 when a character code is written into or read from the DD RAM.
The cursor or blink moves to the right when incremented by 1 and to the left when decremented by 1. The same applies to writing to and reading from the CG RAM.
S: Shifts the entire display either to the right or to the left when S is 1; to the left when I/D = 1 and to the right when I/D = 0. Thus it looks as if the cursor stands still and the display moves.
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 0 0 1 DL N F * *
DL: Sets interface data length
Data is sent or received in 8 bit lengths (DB7-DB0) when DL = 1
Data is sent or received in 4 bit lengths (DB7-DB4) when DL = 0
When the 4 bit length is selected, data must be sent or received twice.
N: Sets number of display lines
N=0 sets 1/8 or 1/11 Duty with 1 Line
N=1 sets 1/16 Duty with 2 or more lines)
F: Sets character font
F=0 sets 5x7 dots
F=1 sets 5x10 dots
Perform the function at the start of the program before executing any instructions (except "Busy flag/address read"). From this point, the function set instruction cannot be executed unless the interface data length is changed.
display Character Duty
N F lines Font Factor Remarks
=== ======= ========= ====== =======
0 0 1 5x 7 dots 1/8 -
0 1 1 5x10 dots 1/11 -
1 * 2&4 5x 7 dots 1/16 Cannot display 2 or 4 lines with 5x10 dot caracter font
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
1 1 D D D D D D D D
Reads binary DDDDDDDD from the CG or DD RAM. The previous designation determines whether the CG or DD RAM is to be read.
Before entering the read instruction, you must execute either the CG RAM or DD RAM address set instruction. If you don't, the first read data will be invalidated. When serially executing the "read" instruction, the next address data is normally read from the second read.
The "address set" instruction need not be executed just before the "read" instruction when shifting the cursor by cursor shift instruction (when reading out DD RAM). The cursor shift instruction operation is the same as that of the DD RAM's address set instruction.
After a read, the entry mode automatically increases or decreases the address by 1. However, display shift is not executed no matter what
the entry mode is.
The address counter (AC) is automatically incremented or decremented by 1 after "write" instructions to either CG RAM or DD RAM.
RAM data selected by the AC cannot them be read out even if "read" instructions are executed. The conditions for correct data read out are: execute either the address set instruction or cursor shift instruction (only with DD RAM), just before reading out execute the "read" instruction from the second time the "read" instruction is serial.
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 1 *
Sets the DD RAM address to 0 in the address counter. Returns the display to its original status if it was shifted. DD RAM contents do not change.
The cursor or blink go to the left edge of the display (the first line if 2 lines are displayed).
Execution Time = 40µs-1.6ms / 120µs-4.8ms
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
1 0 D D D D D D D D
Writes binary 8 bit data DDDDDDDD to the CG or the DD RAM. Whether the CG or DD RAM is to be written is determined by the previous specification of CG RAM or DD RAM address setting.
After the write, the address is automatically incremented or decremented by 1 according to entry mode.
The entry mode also determines display shift.
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 1 BF A A A A A A A
Reads the busy flag (BF) that indicates the system is now internally executing a previously received instruction. BF = 1 indicates that internal operation is in progress. The next instruction will not be accepted until BF is set to "0". Check the BF status before the next wire operation.
At the same time, the value of the address counter expressed in AAAAAAA is read out. The address counter is used by both CG and DD RAM addresses.
Its current use is determined by the previous instruction.
Execution Time = 1µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 1 A A A A A A A
Sets the DD RAM address into the address counter in binary AAAAAAA. Data is then written to or read from the MPU for the DD RAM.
when N = 0 (1 line display)
AAAAAAA is "00" to "4F" (Hex)
when N = 1 (2 to 4 line display, here: 2 lines with each 40 caracters)
AAAAAAA is "00" to "27" (Hex) for the first line and
AAAAAAA is "40" to "67" (Hex) for the second line.
when N = 1 (2 or 4 line display, here: 4 lines with each 16 caracters)
AAAAAAA is "00" to "0F" (Hex) for the first line and
AAAAAAA is "40" to "4F" (Hex) for the second line.
AAAAAAA is "10" to "1F" (Hex) for the third line and
AAAAAAA is "50" to "5F" (Hex) for the fourth line.
Execution Time = 40µs / 120µs
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
0 0 0 1 A A A A A A
Sets the CG RAM address into the address counter in binary AAAAAA. Data is then written to or read from the MPU for the CG RAM.
Execution Time = 40µs / 120µs
The HD44780 automatically initialises (resets) when power is turned on using the internal reset circuit. The following instructions are
executed in initialisation. The busy flag (BF) is kept in busy state until initialisation ends. The busy state (BF=1) is 10ms after Vcc rises to
4.5volts.
1. Display clear
2. Function set ..... DL = 1: 8 bit interface
N = 0: 1 line display
F = 0: 5 x 7 dot character font
3. Display ON/OFF ... D = 0: Display OFF
C = 0: Cursor OFF
B = 0: Blink OFF
4. Entry mode set .. I/D = 1: +1 (increment)
S = 0: No shift
5. Write DD RAM
When the rise time of power supply (0.2 -> 4.5) is out
of the range 0.1ms - 10ms, or when the low level width
of power OFF (less than 0.2) is less than 1ms, the
internal reset circuit will not operate normally.
In this case, initialisation will not be performed
normally. Initialise by instruction, as detailed below.
If the power supply conditions for correctly operating the internal reset circuit are not met, initialisation by instruction is required.
[Power ON]
[ Wait more than 15ms ]
[after Vdd rises to 4.5v]
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Can't check BF before this instruction
0 0 0 0 1 1 * * * * Function set (8-bit interface)
[Wait more than 4.1ms]
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Can't check BF before this instruction
0 0 0 0 1 1 * * * * Function set (8-bit interface)
[Wait more than 100us]
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Can't check BF before this instruction
0 0 0 0 1 1 * * * * Function set (8-bit interface)
BF can be checked after the following
instructions. When BF is not checked,
the waiting time between instructions
is longer than the execution time.
(See Instruction set)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 N F * * Function set [8-bit Interface ]
[Specify display lines]
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 [and character font ]
0 0 0 0 0 0 1 0 0 0 Display OFF [These cannot be changed afterwards]
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 0 1 Display ON
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 1 I/D S entry mode set
[end of initialisation]
[Power ON]
[ Wait more than 15ms ]
[after Vdd rises to 4.5v]
RS R/W DB7 DB6 DB5 DB4 Can't check BF before this instruction
0 0 0 0 1 1 Function set (8-bit interface)
[Wait more than]
[ 4.1ms ]
RS R/W DB7 DB6 DB5 DB4 Can't check BF before this instruction
0 0 0 0 1 1 Function set (8-bit interface)
[Wait more than]
[ 100us ]
RS R/W DB7 DB6 DB5 DB4 Can't check BF before this instruction
0 0 0 0 1 1 Function set (8-bit interface)
BF can be checked after the following
instructions. When BF is not checked,
the waiting time between instructions
is longer than the execution time.
(See Instruction set)
RS R/W DB7 DB6 DB5 DB4
0 0 0 0 1 0 Function set (to 4-bit interface)
RS R/W DB7 DB6 DB5 DB4
0 0 0 0 1 0
0 0 N F * * Function set [4-bit Interface ]
[Specify display lines]
RS R/W DB7 DB6 DB5 DB4 [and character font ]
0 0 0 0 0 0 These cannot be
0 0 1 0 0 0 Display OFF changed afterwards
RS R/W DB7 DB6 DB5 DB4
0 0 0 0 0 0
0 0 0 0 0 1 Display ON
RS R/W DB7 DB6 DB5 DB4
0 0 0 0 0 0
0 0 0 1 I/D S entry mode set
$xref
;$processor(80c517)
; 24.3.96
; LCD-Modul-Ansteuerung über P5.1 .. P5.7 V1.1
; LCD-Controller: HD 44780
; 2Zeilen, 4Bit-Ansteuerung
;
; P5.1 = RS
; P5.2 = R/W
; P5.3 = E
; P5.4 .. P5.7 = DB4 .. DB7
;
org 900h ;Basisadresse
lcd_port equ 0f8h ;Port 5
;Hauptprogramm
call lcd_init ;LCD-Modul initialisieren
mov dptr,#einschaltmeldung ;Anfangsadresse laden
weiter: mov a,#0
movc a,@a+dptr ;Datum holen
jz ende ;alle Daten gelesen
call lcd_write_data ;Daten schreiben
inc dptr ;dptr um eins erhöhen
jmp weiter
ende:
jmp ende ;Endlosschleife
; benötigte Register: R7, R6
; Inititialisierung des Moduls
lcd_init: mov r7,#0ffh ;Verzögerungsschleife für 15ms,
mov r6,#30d ;Die Verzögerungsschleifen sind für 12MHz Systemtakt ausgelegt!
loop: djnz r7,loop
djnz r6,loop
mov lcd_port,#00110000b ;Function set: 8 bit Modus benutzen
call lcd_enable
mov r6,#9d ;Verzögerungsschleife 4,1ms
loop2: djnz r7,loop2
djnz r6,loop2
call lcd_enable
mov r7,#100d ;Verzögerungsschleife 100us
loop3: djnz r7,loop3
call lcd_enable
mov lcd_port,#00100000b ; 4 bit Modus benutzen
call lcd_enable
call lcd_busy
mov r7,#00101000b ;4Bit, 2Zeilen, 5*7
call lcd_write_reg
mov r7,#00001000b ;Display off
call lcd_write_reg
mov r7,#00001100b ;Display on
call lcd_write_reg
mov r7,#00000110b ;entry mode
call lcd_write_reg
call lcd_clr_home ;clear display
ret
;enable: setzen - löschen
lcd_enable: setb lcd_port.3 ;Enable 1 setzen
clr lcd_port.3 ;Enable 0 setzen
ret
;Busyflag prüfen und ggf. warten
lcd_busy: mov lcd_port,#11110100b ;Port auf Eingabe schalten, R/W = 1
lcd_busy_en:
setb lcd_port.3 ;Enable auf 1
jb lcd_port.7,noch_busy ;noch busy
clr lcd_port.3 ;Enable auf 0
call lcd_enable ;Dummyread für die unteren 4Bits
ret
noch_busy: clr lcd_port.3 ;Enable auf 0
call lcd_enable ;Dummyread für die unteren 4Bits
jmp lcd_busy_en
;Befehl aus R7 auf LCD-Modul ausgeben
lcd_write_reg:
call lcd_busy
mov a,#11110000b ;das obere Nibble ausmaskieren
anl a,r7
mov lcd_port,a
call lcd_enable ;und ausgeben
mov a,#00001111b ;das untere Nibble ausmaskieren
anl a,r7
swap a ;Nibbles tauschen
mov lcd_port,a
call lcd_enable ;und ausgeben
ret
;Einen Buchstaben aus dem Akku aufs LCD ausgeben
;benötigtes Register: R7
lcd_write_data:
cjne a,#13d,nichtcr ;Carriage Return
jmp lcd_cr
nichtcr: mov r7,a
call lcd_busy
mov a,#11110000b ;das obere Nibble ausmaskieren
anl a,r7
mov lcd_port,a
setb lcd_port.1 ;RS = 1
call lcd_enable ;und ausgeben
mov a,#00001111b ;das untere Nibble ausmaskieren
anl a,r7
swap a ;Nibbles tauschen
mov lcd_port,a
setb lcd_port.1 ;RS = 1
call lcd_enable ;und ausgeben
ret
;in zweite Zeile springen
lcd_cr: mov r7,#11000000b ;DD-RAM-Adresse auf 40h gesetzt
jmp lcd_write_reg
;Home
lcd_home: mov r7,#2d ;Cursor Home
jmp lcd_write_reg
;Clear Home
lcd_clr_home:
mov r7,#1d ;Clear Home
jmp lcd_write_reg
;DATEN:
einschaltmeldung:
db '80C517A-MC v1.0',13,'(C) 1996 by tob',0
end ;Programmende
The pin assignment shown in Table 1 is the industry standard for character
LCD-modules (except those with more than 80 characters).
To be sure always check the manufacturers datasheet!
To locate pin 1 on a module check the manufacturers datasheet!
1 Vss - - Power supply
(GND)
2 Vcc - - Power supply
(+5V)
3 Vee - - Contrast
adjust
0 = Instruction input
4 RS 0/1 I 1 = Data input
0 = Write to LCD module
5 R/W 0/1 I 1 = Read from LCD module
6 E 1, I Enable signal with 1 à 0
7 DB0 0/1 I/O Data bus line 0 (LSB)
8 DB1 0/1 I/O Data bus line 1
9 DB2 0/1 I/O Data bus line 2
10 DB3 0/1 I/O Data bus line 3
11 DB4 0/1 I/O Data bus line 4
12 DB5 0/1 I/O Data bus line 5
13 DB6 0/1 I/O Data bus line 6
14 DB7 0/1 I/O Data bus line 7 (MSB)
Clears display
and returns
Clear display 0 0 0 0 0 0 0 0 0 1 cursor to the 1.64
home position
(address 0).
Returns cursor
to home
position
(address 0).
Also returns
Cursor home 0 0 0 0 0 0 0 0 1 * display being 1.64
shifted to the
original
position.
DDRAM contents
remains
unchanged.
Sets cursor
move direction
(I/D),
specifies to
shift the
Entry mode set 0 0 0 0 0 0 0 1 I/D S display (S). 0.04
These
operations are
performed
during data
read/write.
Sets On/Off of
all display
(D), cursor
Display On/Off On/Off (C) and
Control 0 0 0 0 0 0 1 D C B blink of 0.04
cursor
position
character (B).
Sets
cursor-move or
display-shift
Cursor/display (S/C), shift
shift 0 0 0 0 0 1 S/C R/L * * direction 0.04
(R/L). DDRAM
contents
remains
unchanged.
Sets interface
data length
(DL), number
Function set 0 0 0 0 1 DL N F * * of display 0.04
line (N) and
character
font(F).
Sets the CGRAM
address. CGRAM
Set CGRAM data is sent
address 0 0 0 1 CGRAM address and received 0.04
after this
setting.
Sets the DDRAM
address. DDRAM
Set DDRAM data is sent
address 0 0 1 DDRAM address and received 0.04
after this
setting.
Reads
Busy-flag (BF)
indicating
Read busy-flag internal
and address 0 1 BF DDRAM address operation is 0.00
counter being
performed and
reads address
counter
contents.
Write to CGRAM Writes data to
or DDRAM 1 0 write data CGRAM or 0.04
DDRAM.
Read from Reads data
CGRAM or 1 1 read data from CGRAM or 0.04
DDRAM DDRAM.
Remarks:
DDRAM = Display Data RAM. CGRAM = Character Generator RAM. DDRAM
address corresponds to cursor position. Address Counter used for both DDRAM
and CGRAM. * = Don't care. ** = Based on Fosc = 250KHz.
I/D 0 = Decrement 1 = Increment
cursor position cursor position
S 0 = No display shift 1 = Display shift
D 0 = Display off 1 = Display on
C 0 = Cursor off 1 = Cursor on
B 0 = Cursor blink off 1 = Cursor blink on
S/C 0 = Move cursor 1 = Shift display
R/L 0 = Shift left 1 = Shift right
DL 0 = 4-bit interface 1 = 8-bit interface
N 0 = 1/8 or 1/11 Duty (1line) 1 = 1/16 Duty (2 lines)
F 0 = 5x7 dots 1 = 5x10 dots
BF 0 = Can accept instruction 1 = Internal operation in progress
Shown after reset (with N=0).
1*8 00..07 00h..07h
1*16 00..15 00h..0Fh
1*20 00..19 00h..13h
1*24 00..23 00h..17h
1*32 00..31 00h..1Fh
1*40 00..39 00h..27h
Shown after reset (with N=1).
2*16 00..15 00h..0Fh + 40h..4Fh
2*20 00..19 00h..13h + 40h..53h
2*24 00..23 00h..17h + 40h..57h
2*32 00..31 00h..1Fh + 40h..5Fh
2*40 00..39 00h..27h + 40h..67h
Shown after reset (with N=1).
4*16 00..15 00h..0Fh + 40h..4Fh + 14h..23h + 54h..63h
4*20 00..19 00h..13h + 40h..53h + 14h..27h + 54h..67h